### STM32 DMA Normal Mode Example Code In the context of using Direct Memory Access (DMA) with STM32 microcontrollers, especially when focusing on normal mode as opposed to circular or double buffer modes, it is important to understand how data transfers are managed without continuous looping back to start addresses once a transfer completes. The following Python-like pseudocode demonstrates setting up and initiating a single-shot DMA transaction for both transmission and reception over UART/USART interfaces. For initializing DMA in normal mode specifically within an STM32 project configured via STM32CubeMX: ```c // Assuming that USARTx_TX_DMA_Channel and USARTx_RX_DMA_Channel have been properly defined. void Init_USART_DMATransfer_NormalMode(void){ /* Ensure all settings below match your specific requirements */ // Enable clocks related to peripherals used here... __HAL_RCC_DMA1_CLK_ENABLE(); __HAL_RCC_USARTx_CLK_ENABLE(); // Configure DMA handler parameters according to user application needs, hdma_usart_tx.Instance = DMA1_Channel4; hdma_usart_rx.Instance = DMA1_Channel5; // Set direction, peripheral base address, memory base address etc., hdma_usart_tx.Init.Direction = DMA_MEMORY_TO_PERIPH; hdma_usart_rx.Init.Direction = DMA_PERIPH_TO_MEMORY; // Specify incrementing/decrementing behavior during transactions hdma_usart_tx.Init.MemInc = DMA_MINC_ENABLE; hdma_usart_rx.Init.MemInc = DMA_MINC_ENABLE; // Define whether source or destination should be incremented after each transfer hdma_usart_tx.Init.PeriphInc = DMA_PINC_DISABLE; hdmar_usart_rx.Init.PeriphInc = DMA_PINC_DISABLE; // Choose width of data items being transferred between memory/peripheral hdma_usart_tx.Init.PeriphDataAlignment= DMA_PDATAALIGN_BYTE; hdma_usart_rx.Init.PeriphDataAlignment= DMA_PDATAALIGN_BYTE; // Match alignment at memory side too hdma_usart_tx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; hdma_usart_rx.Init.MemDataAlignment = DMA_MDATAALIGN_BYTE; // Select FIFO mode configuration if applicable hdma_usart_tx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; hdma_usart_rx.Init.FIFOMode = DMA_FIFOMODE_DISABLE; // For non-circular operation which matches 'normal' usage pattern described by you hdma_usart_tx.Init.Mode = DMA_NORMAL; hdma_usart_rx.Init.Mode = DMA_NORMAL; // Initialize DMA streams/channels based upon above configurations HAL_DMA_Init(&hdma_usart_tx); HAL_DMA_Init(&hdma_usart_rx); // Associate initialized handlers with corresponding USART instances __HAL_LINKDMA(huart, hdmatx, hdma_usart_tx); __HAL_LINKDMA(huart, hdmarx, hdma_usart_rx); // Finally enable interrupts associated with half/full completion events from these channels HAL_NVIC_SetPriority(DMA1_Channel4_IRQn, 0, 1); HAL_NVIC_EnableIRQ(DMA1_Channel4_IRQn); } ``` This setup ensures that only one block of data will be moved before stopping unless explicitly restarted[^1]. After configuring such a system, sending and receiving operations can proceed similarly but require careful handling around ensuring readiness states prior to invoking new transfers due to potential race conditions where previous activities may not yet conclude fully[^3].